[ANNOUNCE] xf86-video-intel 2.20.9

Chris Wilson chris at chris-wilson.co.uk
Sat Sep 29 02:58:09 PDT 2012

And so it came to pass that a critical bug was uncovered in UXA. The
kernel does not like to pageflip when the pipe is off, yet due to the
delayed nature of a pageflip and the relaxed checking performed by UXA,
we could request a pageflip after turning off the display (DPMS). The
kernel rejected that pageflip and the error handling path failed to
restore sanity, and when the screen came back it was stuck on the image
seen before it went to sleep. (Note that there are also some related
kernel bugs, but this update should prevent the most conspicious of the
freezes.) Many thanks to Timo Aaltonen for his efforts in tracking down
the issue.

In other news:

  * Prepare for xorg-1.4, the api is being tweaked again.

  * Handle early FreeScreen in UXA.

  * Reenable XvMC support

  * Do not replace the GPU bo when uploading into the shadow/CPU copy

  * Fix use of an uninitialised GC when drawing glyphs to a depth=1 pixmap

Chris Wilson (39):
      sna: Check that we do not keep a GPU bo around after flushing a ShmPixmap
      sna: Remove special casing of drawing depth=1 glyphs
      sna/gen7: Add some ring switching sanity checks
      sna: Add some asserts useful for tracking an xserver drawing bug
      sna/dri:Add some DBG and assertions to validate names passed back to clients
      sna/gen3+: Trim the target extents to the CompositeClip
      sna: Use inplace X tiling for LLC uploads
      sna: Do not query for the NULL edid property
      sna: Force an inplace upload if already wedged
      sna: Force the stall before trying to upload into a busy CPU bo
      Reorder INTEL_XVMC define so that we pick up Option "XvMC"
      sna: Add missing protection against int16 overflow when copying
      sna: Avoid overflows when translating the box16 extents during a copy
      Allow compilation of a separate i810 driver
      Silence a couple of potential compiler warnings
      sna: Check that the CPU bo exists before declaring it is busy along upload
      sna: Check against op->dst.bo rather than priv->cpu_bo for composite upload
      sna/dri: Fixup a DBG statement not to print gibberish
      sna: Remove unused reference to mibstore.h, removed in future Xorg
      Add miInitializeBackingStore() to compat-api.h
      sna: Accommodate changes to the Damage extension not unwrapping the GC
      sna: Make sure the batch is flushed before setting DPMS
      sna/gen5: Add WA reference
      uxa: Prevent attempting to call intel_mode_fini() before PreInit runs
      sna/dri: Handle pending flips when drawable disappears.
      sna/video: Force integer promotion to avoid u16 overflow for frame size
      Kill mibstore pretend backwards compatibility
      sna: Typo in DBG
      uxa/dri: Confirm Drawable is still attached to an active pipe before flipping
      uxa: Confirm the pipe is alive before flipping
      uxa: Do not attempt to pageflip whilst not master
      uxa: Fixup the last couple of commits after realising I didn't have uxa enabled
      Remove the last couple of references to mibstore
      uxa: Update mode->fb_id after completing pageflips
      sna: Attempt to restore the current mode if pipe is disabled on DPMS on
      sna/dri: Improve handling of flipping with no outputs
      sna: Restore LLC cache level after using a buffer for scanout (uncached)
      uxa: Only destroy the bufmgr if it exists
      2.20.9 release

git tag: 2.20.9

MD5:  6aa7b041fcd8fc7c080d9ad21a295be6  xf86-video-intel-2.20.9.tar.bz2
SHA1: 43c789bae74dceeb5a5e5ff099679f28c6dfa057  xf86-video-intel-2.20.9.tar.bz2
SHA256: b9830c9fdaf2f64648cd45807883821f14dd91f9ff1cfa59af11035f62dc9389  xf86-video-intel-2.20.9.tar.bz2

MD5:  32c352ed9c64440b6ae9444111356f08  xf86-video-intel-2.20.9.tar.gz
SHA1: 9aceb9895a69522e502b3c9ed266be4fd21b1c57  xf86-video-intel-2.20.9.tar.gz
SHA256: f32581b54b1886b527d129f89dfd4cc200e3d6d99ca26c3bf8ce978e3c9bfdb3  xf86-video-intel-2.20.9.tar.gz

Chris Wilson, Intel Open Source Technology Centre
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