[ANNOUNCE] xf86-video-intel 2.6.2

[Eric Anholt]

Here comes a pretty significant bugfix release for the 2.6 2D series.
The goal of this release is to get out the major fixes for GEM and KMS
that we think we've pounded on enough to be stable -- certainly more
stable than previously.  Notable fixes include a significant BO memory
usage reduction (which many have suffered from with compositing),
textured XV suppor twith KMS, and rotation support with KMS.  Some
infrequent failure to render/xv with GEM on 965 (dmesg warnings about
being unable to bind objects) should also be fixed. 

But perhaps the exciting thing for most people will be the dynamic front
buffer allocation.  We nearly slipped this into 2.6.0, but decided that
it was just a little too new.  Well, turns out it was actually in good
shape, and it's time to get it out there.  You'll need UXA to do this.

Bill Nottingham (1):
      Quirk MSI IM-945GSE-A LVDS, TV outputs.

Eric Anholt (23):
      Remove logical context setup.
      Fix compile failure after 45f45c73469f1bd46a1b6fb206f2e9e5e4fd66b3
      warning fix.
      Move 965 video setup to a separate function so we can move it around.
      Do check_aperture_space and batch_start_atomic for i965 video.
      Move i965 render state bo setup back to prepare_composite.
      Use intel_emit_reloc from video to prettify 965 render bind_bo setup.
      Move filter computation from emit_batch_header to prepare_composite.
      i965: Pull check_aperture out to a separate function and make it dtrt.
      Move i965 render transform setup from emit_composite_state to prepare_composite.
      Move i965 render vb setup to use time, and decouple state emit from it.
      Use drm_intel_bo_subdata to put render vb data in.
      Fix build with server 1.4.
      Remove 965 render wm scratch space, which was just unused.
      Move 965 render unit state to BOs.
      Move i965 render kernels to BOs.
      Move i965 render sampler state to BOs.
      Don't forget the new state bos in check_aperture.
      dri2: Use modesetting's master fd instead of opening our own non-master.
      uxa: Ask for BOs ready for rendering for pixmaps.
      Don't do AdjustFrame in KMS mode.
      Fix distcheck from drmmode_display.h deletion.
      Bump version to 2.6.2 for release.

Helge Bahmann (1):
      Move disable_render_standby to EnterVT instead of startup.

Jesse Barnes (2):
      Fixup bogus VBT modes when detected
      Support tiled back/depth on 915-class hardware with DRI2.

Keith Packard (3):
      Make i830_allocate_memory take tiling parameters.
      Resize framebuffer on screen size change (requires UXA and DRI2)
      Assign rotation memory dri_bo to rotation pixmap.

Kristian Høgsberg (12):
      Implement front buffer resize for KMS.
      Fix last-minute "cleanup" that broke the patch.
      Un-revert the I915_SETPARAM_NUM_USED_FENCES commit reverted by accident.
      Fix front buffer memset() for non-KMS case.
      KMS: Hook up crtc::gamma_set.
      Make Xv used a buffer object instead of i830_memory.
      Dont allocate overlay registers in KMS mode.
      Fix i915 textured video to work with the i830_memory -> bo change.
      Access the Xv buffer through the GTT for the non-KMS case.
      KMS: Hook up rotated shadow buffers.
      KMS: Fix bug that prevented EDID data from getting propagated.
      Update kms to work with drmModeModeInfo API update.

Ma Ling (1):
      Don't disable vga centering bit.

Vincent Mussard (1):
      quirk for AOpen MP45

Zhenyu Wang (1):
      TV quirk for HP Compaq nx6310

git tag: 2.6.2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.6.2.tar.bz2
MD5: c171bb4175cfcea2662079ef20ee2020  xf86-video-intel-2.6.2.tar.bz2
SHA1: 8da19bf6c66fa66d42eedae322ee98397ee58397  xf86-video-intel-2.6.2.tar.bz2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.6.2.tar.gz
MD5: 9db24b22c07d0a356388414ae7c3e7f1  xf86-video-intel-2.6.2.tar.gz
SHA1: 403da992f9352f4f2ee8ad13b392c47cc897bb91  xf86-video-intel-2.6.2.tar.gz


-- 
Eric Anholt
eric at anholt.net                         eric.anholt at intel.com


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