[Mesa-dev] [PATCH 3/3] i965/miptree: Stop retiling miptrees

[Chris Wilson]

Quoting Nanley Chery (2018-05-30 21:44:35)
> We previously retiled miptrees to work around limitations of the BLT
> engine. BLORP fallbacks can overcome these, so we no longer have need
> for retiling.
> 
> Removing retiling fixes a number of problems. If the row pitch was too
> wide for the BLT engine, we retiled to linear and had the following
> issues:
> * We retiled on gen6+ platforms which don't actually use the blitter.
> * We ignored miptree_create_for_bo's requests for tiled miptrees.
> 
> I don't know how to write a test for the last issue unfortunately. Also,
> I haven't nominated this for stable releases, because of the amount of
> churn needed - we'd have to pull in the series which stops using the
> blitter on gen6+.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106738
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 62 +------------------
>  1 file changed, 1 insertion(+), 61 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 1c888d5210b..a57720b338a 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -509,46 +509,6 @@ free_aux_state_map(enum isl_aux_state **state)
>     free(state);
>  }
>  
> -static bool
> -need_to_retile_as_linear(struct brw_context *brw, unsigned row_pitch,
> -                         enum isl_tiling tiling, unsigned samples)
> -{
> -   if (samples > 1)
> -      return false;
> -
> -   if (tiling == ISL_TILING_LINEAR)
> -      return false;
> -
> -    /* If the width is much smaller than a tile, don't bother tiling. */
> -   if (row_pitch < 64)
> -      return true;
> -
> -   if (ALIGN(row_pitch, 512) >= 32768) {

For stable, you could at least fix these checks.

The BLT limit is 32767*4 for tiled surfaces, or borrow blt_pitch() from
intel_blit.c (or export the checker from intel_blit.c)
-Chris