[Mesa-dev] [PATCH 21/47] (0021) i965/fs: Remove program key argument from generator.
Shaofeng Tang
shaofeng.tang at intel.com
Mon May 21 03:29:55 UTC 2018
From: Kevin Rogovin <kevin.rogovin at intel.com>
Change-Id: I2689f20b6b217dae853898a72cfb2c716c7ab6b6
---
src/intel/compiler/brw_fs.cpp | 4 ++--
src/intel/compiler/brw_fs.h | 2 --
src/intel/compiler/brw_fs_generator.cpp | 3 +--
src/intel/compiler/brw_shader.cpp | 2 +-
src/intel/compiler/brw_vec4.cpp | 2 +-
src/intel/compiler/brw_vec4_gs_visitor.cpp | 2 +-
src/intel/compiler/brw_vec4_tcs.cpp | 2 +-
7 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index b089b79..1fdde34 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7208,7 +7208,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
*/
brw_compute_flat_inputs(prog_data, shader);
- fs_generator g(compiler, log_data, mem_ctx, (void *) key, &prog_data->base,
+ fs_generator g(compiler, log_data, mem_ctx, &prog_data->base,
v8.promoted_constants, v8.runtime_check_aads_emit,
MESA_SHADER_FRAGMENT);
@@ -7448,7 +7448,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
if (error_str)
*error_str = ralloc_strdup(mem_ctx, fail_msg);
} else {
- fs_generator g(compiler, log_data, mem_ctx, (void*) key, &prog_data->base,
+ fs_generator g(compiler, log_data, mem_ctx, &prog_data->base,
promoted_constants, false, MESA_SHADER_COMPUTE);
if (INTEL_DEBUG & DEBUG_CS) {
char *name = ralloc_asprintf(mem_ctx, "%s compute shader %s",
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index faf5156..dc44230 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -387,7 +387,6 @@ class fs_generator
public:
fs_generator(const struct brw_compiler *compiler, void *log_data,
void *mem_ctx,
- const void *key,
struct brw_stage_prog_data *prog_data,
unsigned promoted_constants,
bool runtime_check_aads_emit,
@@ -485,7 +484,6 @@ private:
const struct gen_device_info *devinfo;
struct brw_codegen *p;
- const void * const key;
struct brw_stage_prog_data * const prog_data;
unsigned dispatch_width; /**< 8, 16 or 32 */
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 48bf08c..b78fd44 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -175,14 +175,13 @@ brw_reg_from_fs_reg(const struct gen_device_info *devinfo, fs_inst *inst,
fs_generator::fs_generator(const struct brw_compiler *compiler, void *log_data,
void *mem_ctx,
- const void *key,
struct brw_stage_prog_data *prog_data,
unsigned promoted_constants,
bool runtime_check_aads_emit,
gl_shader_stage stage)
: compiler(compiler), log_data(log_data),
- devinfo(compiler->devinfo), key(key),
+ devinfo(compiler->devinfo),
prog_data(prog_data),
promoted_constants(promoted_constants),
runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false),
diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
index f0e1443..954f8b0 100644
--- a/src/intel/compiler/brw_shader.cpp
+++ b/src/intel/compiler/brw_shader.cpp
@@ -1272,7 +1272,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
- fs_generator g(compiler, log_data, mem_ctx, (void *) key,
+ fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, false,
MESA_SHADER_TESS_EVAL);
if (unlikely(INTEL_DEBUG & DEBUG_TES)) {
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index 1e384f5..98aedc5 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -2912,7 +2912,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
- fs_generator g(compiler, log_data, mem_ctx, (void *) key,
+ fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants,
v.runtime_check_aads_emit, MESA_SHADER_VERTEX);
if (INTEL_DEBUG & DEBUG_VS) {
diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp
index fb4c125..02871ee 100644
--- a/src/intel/compiler/brw_vec4_gs_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp
@@ -856,7 +856,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
- fs_generator g(compiler, log_data, mem_ctx, &c.key,
+ fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants,
false, MESA_SHADER_GEOMETRY);
if (unlikely(INTEL_DEBUG & DEBUG_GS)) {
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 8024011..1f0a69f 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -474,7 +474,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
- fs_generator g(compiler, log_data, mem_ctx, (void *) key,
+ fs_generator g(compiler, log_data, mem_ctx,
&prog_data->base.base, v.promoted_constants, false,
MESA_SHADER_TESS_CTRL);
if (unlikely(INTEL_DEBUG & DEBUG_TCS)) {
--
2.7.4
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