[Mesa-dev] [PATCH 39/47] (0037) i965/fs: Fix the MOV_DISPATCH_TO_FLAGS instruction for SIMD32.

[Shaofeng Tang]

From: Kevin Rogovin <kevin.rogovin at intel.com>

Change-Id: I9f434efa2197239ccff165e8d7aaae0dd833e966
Signed-off-by: valtteri rantala <valtteri.rantala at intel.com>
---
 src/intel/compiler/brw_fs_generator.cpp | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 3d1b9c3..1bcf2b8 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1560,19 +1560,16 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
 void
 fs_generator::generate_mov_dispatch_to_flags(fs_inst *inst)
 {
-   struct brw_reg flags = brw_flag_subreg(inst->flag_subreg);
-   struct brw_reg dispatch_mask;
-
-   if (devinfo->gen >= 6)
-      dispatch_mask = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
-   else
-      dispatch_mask = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
-
-   brw_push_insn_state(p);
-   brw_set_default_mask_control(p, BRW_MASK_DISABLE);
-   brw_set_default_exec_size(p, BRW_EXECUTE_1);
-   brw_MOV(p, flags, dispatch_mask);
-   brw_pop_insn_state(p);
+   assert(devinfo->gen >= 6 || inst->exec_size <= 16);
+
+   for (unsigned i = 0; i < DIV_ROUND_UP(inst->exec_size, 16u); i++) {
+      const struct brw_reg flags = brw_flag_subreg(inst->flag_subreg + i);
+      const struct brw_reg dispatch_mask =
+         retype(devinfo->gen >= 6 ? brw_vec1_grf(1 + i, 7) : brw_vec1_grf(0, 0),
+                BRW_REGISTER_TYPE_UW);
+      brw_inst *insn = brw_MOV(p, flags, dispatch_mask);
+      brw_inst_set_mask_control(p->devinfo, insn, BRW_MASK_DISABLE);
+   }
 }
 
 void
-- 
2.7.4