[Mesa-dev] [PATCH v2 15/18] intel/compiler: implement 16-bit pack/unpack opcodes
Jason Ekstrand
jason at jlekstrand.net
Mon Apr 30 21:55:25 UTC 2018
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
On Mon, Apr 30, 2018 at 7:18 AM, Iago Toral Quiroga <itoral at igalia.com>
wrote:
> ---
> src/intel/compiler/brw_fs_nir.cpp | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index d590a00385..25e85b9b25 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -1313,6 +1313,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld,
> nir_alu_instr *instr)
> break;
>
> case nir_op_pack_64_2x32_split:
> + case nir_op_pack_32_2x16_split:
> bld.emit(FS_OPCODE_PACK, result, op[0], op[1]);
> break;
>
> @@ -1325,6 +1326,15 @@ fs_visitor::nir_emit_alu(const fs_builder &bld,
> nir_alu_instr *instr)
> break;
> }
>
> + case nir_op_unpack_32_2x16_split_x:
> + case nir_op_unpack_32_2x16_split_y: {
> + if (instr->op == nir_op_unpack_32_2x16_split_x)
> + bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UW, 0));
> + else
> + bld.MOV(result, subscript(op[0], BRW_REGISTER_TYPE_UW, 1));
> + break;
> + }
> +
> case nir_op_fpow:
> inst = bld.emit(SHADER_OPCODE_POW, result, op[0], op[1]);
> inst->saturate = instr->dest.saturate;
> --
> 2.14.1
>
>
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