[Mesa-dev] [PATCH v2 05/18] intel/compiler: implement nir_instr_type_load_const for 16-bit constants
Iago Toral Quiroga
itoral at igalia.com
Mon Apr 30 14:18:13 UTC 2018
From: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
---
src/intel/compiler/brw_fs_nir.cpp | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 300884de05..b9d8ade4cf 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1510,6 +1510,11 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
switch (instr->def.bit_size) {
+ case 16:
+ for (unsigned i = 0; i < instr->def.num_components; i++)
+ bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value.i16[i]));
+ break;
+
case 32:
for (unsigned i = 0; i < instr->def.num_components; i++)
bld.MOV(offset(reg, bld, i), brw_imm_d(instr->value.i32[i]));
--
2.14.1
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