[Mesa-dev] [Bug 106246] radv: VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT and bringing down initial pipeline compile times

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=106246

--- Comment #4 from Timothy Arceri <t_arceri at yahoo.com.au> ---
(In reply to Nicolai Hähnle from comment #3)
> As long as scratch buffer support is robust, removing LLVM IR optimization
> passes is probably not a problem, though you really do want mem2reg and I
> don't think we spend much time in the others (at least radeonsi didn't, last
> time I checked).
> 
> Using the -O0 settings for the codegen backend is a lot riskier. Our compute
> folks have done some work fixing bugs there, but I really wouldn't recommend
> it.

Yeah I've done some experimenting with the Blacksmith demo. I'm not sure we can
get much benefit implementing VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT with
the current state of things. 

Default:
Sum of shader compile times: 325933 ms

With only LLVM DCE opt (compilation fails without this):
Sum of shader compile times: 326451 ms

No NIR linking plus single pass over NIR opts (compilation fails without this):
Sum of shader compile times: 294788 ms

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/mesa-dev/attachments/20180427/c30d122a/attachment-0001.html>