[Mesa-dev] [PATCH 02/11] intel/compiler: fix isign for 16-bit integers

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Wed, Apr 11, 2018 at 12:20 AM, Iago Toral Quiroga <itoral at igalia.com>
wrote:

> We need to use 16-bit constants with 16-bit instructions,
> otherwise we get the following validation error:
>
> "Destination stride must be equal to the ratio of the sizes of
>  the execution data type to the destination type"
>
> Because the execution data type is 4B due to the 32-bit integer
> constant.
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 17 ++++++++++++-----
>  1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index 6c4bcd1c113..f40a3540e31 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -863,17 +863,24 @@ fs_visitor::nir_emit_alu(const fs_builder &bld,
> nir_alu_instr *instr)
>        break;
>     }
>
> -   case nir_op_isign:
> +   case nir_op_isign: {
>        /*  ASR(val, 31) -> negative val generates 0xffffffff (signed -1).
>         *               -> non-negative val generates 0x00000000.
>         *  Predicated OR sets 1 if val is positive.
>         */
> -      assert(nir_dest_bit_size(instr->dest.dest) < 64);
> -      bld.CMP(bld.null_reg_d(), op[0], brw_imm_d(0), BRW_CONDITIONAL_G);
> -      bld.ASR(result, op[0], brw_imm_d(31));
> -      inst = bld.OR(result, result, brw_imm_d(1));
> +      uint32_t bit_size = nir_dest_bit_size(instr->dest.dest);
> +      assert(bit_size == 32 || bit_size == 16);
> +
> +      fs_reg zero = bit_size == 32 ? brw_imm_d(0) : brw_imm_w(0);
> +      fs_reg one = bit_size == 32 ? brw_imm_d(1) : brw_imm_w(1);
> +      fs_reg shift = bit_size == 32 ? brw_imm_d(31) : brw_imm_w(15);
> +
> +      bld.CMP(bld.null_reg_d(), op[0], zero, BRW_CONDITIONAL_G);
> +      bld.ASR(result, op[0], shift);
> +      inst = bld.OR(result, result, one);
>        inst->predicate = BRW_PREDICATE_NORMAL;
>        break;
> +   }
>
>     case nir_op_frcp:
>        inst = bld.emit(SHADER_OPCODE_RCP, result, op[0]);
> --
> 2.14.1
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/mesa-dev/attachments/20180424/480b60b2/attachment.html>