[Mesa-dev] [PATCH] radeonsi/gfx9: fix a hang with an empty first IB
Marek Olšák
maraeo at gmail.com
Sat Apr 21 04:48:04 UTC 2018
Hi Juan,
Here is the patch backported to 18.0:
https://cgit.freedesktop.org/~mareko/mesa/commit/?h=amd-18.0&id=7ab59306613b08c7dd6e875c3276cac9a61889ae
Marek
On Fri, Apr 20, 2018 at 10:57 AM, Juan A. Suarez Romero <jasuarez at igalia.com
> wrote:
> On Tue, 2018-04-17 at 15:54 -0400, Marek Olšák wrote:
> > From: Marek Olšák <marek.olsak at amd.com>
> >
> > This packet causes the no-op IB detection to fail, so the IB is always
> > submitted. Also fix the no-op IB detection by moving the begin call.
> >
> > Cc: 18.0 <mesa-stable at lists.freedesktop.org>
>
>
> This patch does not apply cleanly in 18.0, so I've resolved the conflicts.
>
> Please, take a look at [1] to see if it is everything correct. Thanks in
> advance!
>
>
> [1] https://github.com/Igalia/release-mesa/commit/
> 68768a94b21d2c20e45ebae29698c4
> f40f43e18f
>
>
>
> J.A.
>
>
> > ---
> > src/gallium/drivers/radeonsi/si_pipe.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/src/gallium/drivers/radeonsi/si_pipe.c
> > index d044b191b71..ac16aae3078 100644
> > --- a/src/gallium/drivers/radeonsi/si_pipe.c
> > +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> > @@ -522,38 +522,37 @@ static struct pipe_context
> *si_create_context(struct pipe_screen *screen,
> > sctx->b.resource_copy_region = sctx->dma_copy;
> >
> > sctx->blitter = util_blitter_create(&sctx->b);
> > if (sctx->blitter == NULL)
> > goto fail;
> > sctx->blitter->draw_rectangle = si_draw_rectangle;
> > sctx->blitter->skip_viewport_restore = true;
> >
> > sctx->sample_mask = 0xffff;
> >
> > - /* these must be last */
> > - si_begin_new_gfx_cs(sctx);
> > -
> > if (sctx->chip_class >= GFX9) {
> > sctx->wait_mem_scratch = r600_resource(
> > pipe_buffer_create(screen, 0, PIPE_USAGE_DEFAULT,
> 4));
> > if (!sctx->wait_mem_scratch)
> > goto fail;
> >
> > /* Initialize the memory. */
> > struct radeon_winsys_cs *cs = sctx->gfx_cs;
> > radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
> > radeon_emit(cs, S_370_DST_SEL(V_370_MEMORY_SYNC) |
> > S_370_WR_CONFIRM(1) |
> > S_370_ENGINE_SEL(V_370_ME));
> > radeon_emit(cs, sctx->wait_mem_scratch->gpu_address);
> > radeon_emit(cs, sctx->wait_mem_scratch->gpu_address >>
> 32);
> > radeon_emit(cs, sctx->wait_mem_number);
> > + radeon_add_to_buffer_list(sctx, cs,
> sctx->wait_mem_scratch,
> > + RADEON_USAGE_WRITE,
> RADEON_PRIO_FENCE);
> > }
> >
> > /* CIK cannot unbind a constant buffer (S_BUFFER_LOAD doesn't skip
> loads
> > * if NUM_RECORDS == 0). We need to use a dummy buffer instead. */
> > if (sctx->chip_class == CIK) {
> > sctx->null_const_buf.buffer =
> > pipe_aligned_buffer_create(screen,
> > SI_RESOURCE_FLAG_32BIT,
> > PIPE_USAGE_DEFAULT, 16,
> >
> sctx->screen->info.tcc_cache_line_size);
> > @@ -612,20 +611,22 @@ static struct pipe_context
> *si_create_context(struct pipe_screen *screen,
> >
> _mesa_key_pointer_equal);
> > sctx->img_handles = _mesa_hash_table_create(NULL,
> _mesa_hash_pointer,
> >
> _mesa_key_pointer_equal);
> >
> > util_dynarray_init(&sctx->resident_tex_handles, NULL);
> > util_dynarray_init(&sctx->resident_img_handles, NULL);
> > util_dynarray_init(&sctx->resident_tex_needs_color_decompress,
> NULL);
> > util_dynarray_init(&sctx->resident_img_needs_color_decompress,
> NULL);
> > util_dynarray_init(&sctx->resident_tex_needs_depth_decompress,
> NULL);
> >
> > + /* this must be last */
> > + si_begin_new_gfx_cs(sctx);
> > return &sctx->b;
> > fail:
> > fprintf(stderr, "radeonsi: Failed to create a context.\n");
> > si_destroy_context(&sctx->b);
> > return NULL;
> > }
> >
> > static struct pipe_context *si_pipe_create_context(struct pipe_screen
> *screen,
> > void *priv, unsigned
> flags)
> > {
>
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