[Mesa-dev] [PATCH 4/4] intel/compiler: Add scheduler deps for instructions that implicitly read g0
Kenneth Graunke
kenneth at whitecape.org
Sat Apr 21 00:53:55 UTC 2018
On Friday, April 20, 2018 5:01:17 PM PDT Jason Ekstrand wrote:
> On Fri, Apr 20, 2018 at 4:30 PM, Ian Romanick <idr at freedesktop.org> wrote:
>
> > On 04/20/2018 11:56 AM, Jason Ekstrand wrote:
> > > Ugh... I was actually thinking about this the other day. How did you
> > > come up with your list of instructions? Is there some algorithmic way
> > > to determine it such as sends with no header?
> >
> > I just looked through the generator for pseudo-ops that emit explicit
> > reads of g0. Since it was a manual process, I may have missed some. :(
> > I don't know of a way to automate this, but... it may be possible. Not
> > sure.
> >
>
> We ran into a similar issue with Dota 2 on Vulkan which was fixed by
> ff4726077d86800d33520581f154a27dac408588
>
> For vec4, this may be a reasonable solution. I don't like list of
> instructions in general but I'm a bit more ok with duct tape in vec4.
> Adding matt & Ken in case they have opinions.
Duct tape in vec4 seems good to me. Patch is:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
In the scalar backend, we're trying to move away from these implicit
things happening in the generator, and just make them visible to the
visitor (like Jason did).
I suspect that just about everything that turns into a SEND message
will need g0 for FFTID - the shared functions need the fixed-function
thread ID to know where to send the return message. It might be passed
as side-band though and not actually read as part of g0...so we probably
can't do anything that simple...
But as I said, R-b. I certainly wouldn't advocate spending more time
in vec4 than you have to.
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