[Mesa-dev] [PATCH 1/7] ac/surface: handle DCC subresource fast clear restriction on VI

[Marek Olšák]

On Wed, Apr 18, 2018, 8:01 PM Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
wrote:

> On Wed, Apr 18, 2018 at 2:11 PM, Marek Olšák <maraeo at gmail.com> wrote:
> > On Wed, Apr 18, 2018 at 4:44 PM, Bas Nieuwenhuizen <
> bas at basnieuwenhuizen.nl>
> > wrote:
> >>
> >> IIRC if level N is unaligned then num_dcc_levels <= N+1, so level N+1
> >> is not DCC compressed?
> >
> >
> > There is a difference between being aligned (contiguous really) and being
> > compressible. Small mip levels might be unaligned but may still
> > compressible. Non-contiguous can mean that DCC of multiple mip levels is
> > interleaved in memory. It can't be cleared with memset trivially, but it
> can
> > still be compressed.
>
> Hw-wise probably, but if level N is not aligned addrlib will set
> subLvlCompressible to false[1], and hence the next level will not be
> DCC compressed[2]?
>

Even if a level is not compressible (by CB), TC still reads DCC and does
decompression. So it's necessary that the last compressed level doesn't do
fast clear if it's not contiguous. If you remove CB out of the picture, you
can probably compress the whole miptree.

Marek


> [1]
> https://cgit.freedesktop.org/mesa/mesa/tree/src/amd/addrlib/r800/ciaddrlib.cpp#n268
> [2]
> https://cgit.freedesktop.org/mesa/mesa/tree/src/amd/common/ac_surface.c#n345
>
> >
> > Marek
> >
>
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