[Mesa-dev] [PATCH 1/5] radv: implement fast color clear for DCC with MSAA

Samuel Pitoiset samuel.pitoiset at gmail.com
Tue Apr 17 14:05:14 UTC 2018


When DCC is enabled with MSAA textures, CMASK should be
cleared to 0xCCCCCCCC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_meta_clear.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 016c1ee296e..86e0bc17ed8 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1054,14 +1054,29 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
 	if (radv_image_has_dcc(iview->image)) {
 		uint32_t reset_value;
 		bool can_avoid_fast_clear_elim;
+		bool need_decompress_pass = false;
+
 		vi_get_fast_clear_parameters(iview->image->vk_format,
 					     &clear_value, &reset_value,
 					     &can_avoid_fast_clear_elim);
 
+		if (iview->image->info.samples > 1) {
+			/* DCC fast clear with MSAA should clear CMASK. */
+			assert(radv_image_has_cmask(iview->image));
+
+			flush_bits = radv_clear_cmask(cmd_buffer, iview->image,
+						      cmask_clear_value);
+
+			need_decompress_pass = true;
+		}
+
+		if (!can_avoid_fast_clear_elim)
+			need_decompress_pass = true;
+
 		flush_bits = radv_clear_dcc(cmd_buffer, iview->image, reset_value);
 
 		radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image,
-						  !can_avoid_fast_clear_elim);
+						  need_decompress_pass);
 	} else {
 		flush_bits = radv_clear_cmask(cmd_buffer, iview->image,
 					      cmask_clear_value);
-- 
2.17.0



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