[Mesa-dev] [PATCH 4/9] radeonsi: remove si_atom::id

Marek Olšák maraeo at gmail.com
Tue Apr 17 00:42:06 UTC 2018


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_pipe.h       | 21 ++++++++++----------
 src/gallium/drivers/radeonsi/si_state.c      | 14 -------------
 src/gallium/drivers/radeonsi/si_state.h      |  6 +++---
 src/gallium/drivers/radeonsi/si_state_draw.c |  2 +-
 4 files changed, 15 insertions(+), 28 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 37ff05082cf..41f88b9688e 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1332,44 +1332,45 @@ si_context_add_resource_size(struct si_context *sctx, struct pipe_resource *r)
 		sctx->gtt += res->gart_usage;
 	}
 }
 
 static inline void
 si_invalidate_draw_sh_constants(struct si_context *sctx)
 {
 	sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN;
 }
 
+static inline unsigned
+si_get_atom_bit(struct si_context *sctx, struct si_atom *atom)
+{
+	return 1 << (atom - sctx->atoms.array);
+}
+
 static inline void
-si_set_atom_dirty(struct si_context *sctx,
-		  struct si_atom *atom, bool dirty)
+si_set_atom_dirty(struct si_context *sctx, struct si_atom *atom, bool dirty)
 {
-	unsigned bit = 1 << atom->id;
+	unsigned bit = si_get_atom_bit(sctx, atom);
 
 	if (dirty)
 		sctx->dirty_atoms |= bit;
 	else
 		sctx->dirty_atoms &= ~bit;
 }
 
 static inline bool
-si_is_atom_dirty(struct si_context *sctx,
-		 struct si_atom *atom)
+si_is_atom_dirty(struct si_context *sctx, struct si_atom *atom)
 {
-	unsigned bit = 1 << atom->id;
-
-	return sctx->dirty_atoms & bit;
+	return (sctx->dirty_atoms & si_get_atom_bit(sctx, atom)) != 0;
 }
 
 static inline void
-si_mark_atom_dirty(struct si_context *sctx,
-		   struct si_atom *atom)
+si_mark_atom_dirty(struct si_context *sctx, struct si_atom *atom)
 {
 	si_set_atom_dirty(sctx, atom, true);
 }
 
 static inline struct si_shader_ctx_state *si_get_vs(struct si_context *sctx)
 {
 	if (sctx->gs_shader.cso)
 		return &sctx->gs_shader;
 	if (sctx->tes_shader.cso)
 		return &sctx->tes_shader;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8841077cca1..568b11d1eea 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -26,33 +26,25 @@
 #include "gfx9d.h"
 #include "si_query.h"
 
 #include "util/u_dual_blend.h"
 #include "util/u_format.h"
 #include "util/u_format_s3tc.h"
 #include "util/u_memory.h"
 #include "util/u_resource.h"
 #include "util/u_upload_mgr.h"
 
-/* Initialize an external atom (owned by ../radeon). */
-static void
-si_init_external_atom(struct si_context *sctx, struct si_atom *atom)
-{
-	atom->id = atom - sctx->atoms.array;
-}
-
 /* Initialize an atom owned by radeonsi.  */
 void si_init_atom(struct si_context *sctx, struct si_atom *atom,
 		  void (*emit_func)(struct si_context *ctx, struct si_atom *state))
 {
 	atom->emit = emit_func;
-	atom->id = atom - sctx->atoms.array;
 }
 
 static unsigned si_map_swizzle(unsigned swizzle)
 {
 	switch (swizzle) {
 	case PIPE_SWIZZLE_Y:
 		return V_008F0C_SQ_SEL_Y;
 	case PIPE_SWIZZLE_Z:
 		return V_008F0C_SQ_SEL_Z;
 	case PIPE_SWIZZLE_W:
@@ -4519,26 +4511,20 @@ static void *si_create_blend_custom(struct si_context *sctx, unsigned mode)
 	memset(&blend, 0, sizeof(blend));
 	blend.independent_blend_enable = true;
 	blend.rt[0].colormask = 0xf;
 	return si_create_blend_state_mode(&sctx->b, &blend, mode);
 }
 
 static void si_init_config(struct si_context *sctx);
 
 void si_init_state_functions(struct si_context *sctx)
 {
-	si_init_external_atom(sctx, &sctx->atoms.s.render_cond);
-	si_init_external_atom(sctx, &sctx->atoms.s.streamout_begin);
-	si_init_external_atom(sctx, &sctx->atoms.s.streamout_enable);
-	si_init_external_atom(sctx, &sctx->atoms.s.scissors);
-	si_init_external_atom(sctx, &sctx->atoms.s.viewports);
-
 	si_init_atom(sctx, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state);
 	si_init_atom(sctx, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs);
 	si_init_atom(sctx, &sctx->atoms.s.db_render_state, si_emit_db_render_state);
 	si_init_atom(sctx, &sctx->atoms.s.dpbb_state, si_emit_dpbb_state);
 	si_init_atom(sctx, &sctx->atoms.s.msaa_config, si_emit_msaa_config);
 	si_init_atom(sctx, &sctx->atoms.s.sample_mask, si_emit_sample_mask);
 	si_init_atom(sctx, &sctx->atoms.s.cb_render_state, si_emit_cb_render_state);
 	si_init_atom(sctx, &sctx->atoms.s.blend_color, si_emit_blend_color);
 	si_init_atom(sctx, &sctx->atoms.s.clip_regs, si_emit_clip_regs);
 	si_init_atom(sctx, &sctx->atoms.s.clip_state, si_emit_clip_state);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 6c9899d9468..4ee69b95bd3 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -38,25 +38,25 @@
 #define SI_NUM_CONST_BUFFERS		16
 #define SI_NUM_IMAGES			16
 #define SI_NUM_SHADER_BUFFERS		16
 
 struct si_screen;
 struct si_shader;
 struct si_shader_selector;
 struct r600_texture;
 struct si_qbo_state;
 
-/* This encapsulates a state or an operation which can emitted into the GPU
- * command stream. */
+/* State atoms are callbacks which write a sequence of packets into a GPU
+ * command buffer (AKA indirect buffer, AKA IB, AKA command stream, AKA CS).
+ */
 struct si_atom {
 	void (*emit)(struct si_context *ctx, struct si_atom *state);
-	unsigned short		id;
 };
 
 struct si_state_blend {
 	struct si_pm4_state	pm4;
 	uint32_t		cb_target_mask;
 	/* Set 0xf or 0x0 (4 bits) per render target if the following is
 	 * true. ANDed with spi_shader_col_format.
 	 */
 	unsigned		cb_target_enabled_4bit;
 	unsigned		blend_enable_4bit;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 531ed106d6a..6f827fa45a6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1428,21 +1428,21 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 				      SI_CONTEXT_PS_PARTIAL_FLUSH |
 				      SI_CONTEXT_CS_PARTIAL_FLUSH))) {
 		/* If we have to wait for idle, set all states first, so that all
 		 * SET packets are processed in parallel with previous draw calls.
 		 * Then draw and prefetch at the end. This ensures that the time
 		 * the CUs are idle is very short.
 		 */
 		unsigned masked_atoms = 0;
 
 		if (unlikely(sctx->flags & SI_CONTEXT_FLUSH_FOR_RENDER_COND))
-			masked_atoms |= 1u << sctx->atoms.s.render_cond.id;
+			masked_atoms |= si_get_atom_bit(sctx, &sctx->atoms.s.render_cond);
 
 		if (!si_upload_graphics_shader_descriptors(sctx))
 			return;
 
 		/* Emit all states except possibly render condition. */
 		si_emit_all_states(sctx, info, masked_atoms);
 		si_emit_cache_flush(sctx);
 		/* <-- CUs are idle here. */
 
 		if (si_is_atom_dirty(sctx, &sctx->atoms.s.render_cond))
-- 
2.17.0



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