[Mesa-dev] [PATCH 2/2] radv: don't use the SPI barrier management bug workaround

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

for the series.

On Wed, Apr 4, 2018 at 10:55 AM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Ported from RadeonSI.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_pipeline.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index 5a44efb78b..89a643a1b1 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -1274,6 +1274,11 @@ calculate_gs_ring_sizes(struct radv_pipeline *pipeline, const struct radv_gs_sta
>  static void si_multiwave_lds_size_workaround(struct radv_device *device,
>                                              unsigned *lds_size)
>  {
> +       /* If tessellation is all offchip and on-chip GS isn't used, this
> +        * workaround is not needed.
> +        */
> +       return;
> +
>         /* SPI barrier management bug:
>          *   Make sure we have at least 4k of LDS in use to avoid the bug.
>          *   It applies to workgroup sizes of more than one wavefront.
> --
> 2.16.3
>
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