[Mesa-dev] [PATCH] radeonsi: skip DCC render feedback checking if color writes are disabled
Marek Olšák
maraeo at gmail.com
Mon Apr 2 03:54:42 UTC 2018
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_blit.c | 5 +++++
src/gallium/drivers/radeonsi/si_pipe.h | 17 +++++++++++++++++
src/gallium/drivers/radeonsi/si_state_shaders.c | 6 +-----
3 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index f1c4f6d..c34d677 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -706,20 +706,25 @@ static void si_check_render_feedback_resident_images(struct si_context *sctx)
si_check_render_feedback_texture(sctx, tex,
view->u.tex.level,
view->u.tex.level,
view->u.tex.first_layer,
view->u.tex.last_layer);
}
}
static void si_check_render_feedback(struct si_context *sctx)
{
+ /* There is no render feedback if color writes are disabled.
+ * (e.g. a pixel shader with image stores)
+ */
+ if (!si_get_total_colormask(sctx))
+ return;
if (!sctx->need_check_render_feedback)
return;
for (int i = 0; i < SI_NUM_SHADERS; ++i) {
si_check_render_feedback_images(sctx, &sctx->images[i]);
si_check_render_feedback_textures(sctx, &sctx->samplers[i]);
}
si_check_render_feedback_resident_images(sctx);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 2053dcb..e75e6c1 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -923,11 +923,28 @@ si_htile_enabled(struct r600_texture *tex, unsigned level)
return tex->htile_offset && level == 0;
}
static inline bool
vi_tc_compat_htile_enabled(struct r600_texture *tex, unsigned level)
{
assert(!tex->tc_compatible_htile || tex->htile_offset);
return tex->tc_compatible_htile && level == 0;
}
+static inline unsigned si_get_total_colormask(struct si_context *sctx)
+{
+ if (sctx->queued.named.rasterizer->rasterizer_discard)
+ return 0;
+
+ struct si_shader_selector *ps = sctx->ps_shader.cso;
+ unsigned colormask = sctx->framebuffer.colorbuf_enabled_4bit &
+ sctx->queued.named.blend->cb_target_mask;
+
+ if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
+ colormask &= ps->colors_written_4bit;
+ else if (!ps->colors_written_4bit)
+ colormask = 0; /* color0 writes all cbufs, but it's not written */
+
+ return colormask;
+}
+
#endif
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 8fe4c04..45eded9 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1208,25 +1208,21 @@ static void si_shader_selector_key_hw_vs(struct si_context *sctx,
bool ps_disabled = true;
if (ps) {
const struct si_state_blend *blend = sctx->queued.named.blend;
bool alpha_to_coverage = blend && blend->alpha_to_coverage;
bool ps_modifies_zs = ps->info.uses_kill ||
ps->info.writes_z ||
ps->info.writes_stencil ||
ps->info.writes_samplemask ||
alpha_to_coverage ||
si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS;
-
- unsigned ps_colormask = sctx->framebuffer.colorbuf_enabled_4bit &
- sctx->queued.named.blend->cb_target_mask;
- if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
- ps_colormask &= ps->colors_written_4bit;
+ unsigned ps_colormask = si_get_total_colormask(sctx);
ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard ||
(!ps_colormask &&
!ps_modifies_zs &&
!ps->info.writes_memory);
}
/* Find out which VS outputs aren't used by the PS. */
uint64_t outputs_written = vs->outputs_written;
uint64_t inputs_read = 0;
--
2.7.4
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