[Mesa-dev] [PATCH v2] i965/fs: Strip trailing constant zeroes in sample messages

[Matt Turner]

On Thu, Apr 30, 2015 at 10:27 AM, Neil Roberts <neil at linux.intel.com> wrote:
> If a send message is emitted with a message length that is less than
> required for the message then the remaining parameters default to
> zero. We can take advantage of this to save a register when a shader
> passes constant zeroes as the final coordinates to the sample
> function.
>
> I think this might be useful for GLES applications that are using 2D
> textures to simulate 1D textures.
>
> On Skylake it will be useful for shaders that do
> texelFetch(tex,something,0) which I think is fairly common. This helps
> more on Skylake because in that case the order of the instruction
> operands are u,v,lod,r which is good for 2D textures whereas before
> they were u,lod,v,r which is only good for 1D textures.
>
> On Haswell:
> total instructions in shared programs: 8535730 -> 8533261 (-0.03%)
> instructions in affected programs:     236968 -> 234499 (-1.04%)
> helped:                                1174
>
> On Skylake:
> total instructions in shared programs: 10345646 -> 10341237 (-0.04%)
> instructions in affected programs:     293011 -> 288602 (-1.50%)
> helped:                                1218
>
> v2: Applied suggestions by Kenneth Graunke:
>     - Only apply on Gen5+
>     - Apply to all texture opcodes, not just TEX and TXF.
>     Moved the optimisation into the loop as suggested by Matt Turner.
>     Fix the array index when there is a header.
> ---
> This is a v2 of the patch taking into account suggestions by Ken and
> Matt.
>
> It turns out putting the optimisation inside the loop does help. I
> looked at one of the cases where it helps and it seems to run
> opt_copy_propagate an extra time and it ends up with one less mov
> instruction.

Nice!

Reviewed-by: Matt Turner <mattst88 at gmail.com>