[Mesa-dev] i965 FS/VEC4 generic programming.

[Francisco Jerez]

This series is motivated by the ridiculous amount of duplicated code
between the i965 FS and VEC4 compiler back-ends.  My next >2k LoC
patch series implementing the built-ins defined by
ARB_shader_image_load_store on the i965 back-end would have been plain
insulting without some mechanism to generate IR in a back-end-agnostic
manner.

The framework introduced in this series is expressive enough to
implement most of the translation from GLSL IR or NIR into i965 IR
independent of the back-end, but at this point only my image
load/store and atomic counters implementations make full use of it.
Both can be found in the image-load-store branch of my tree [1]
together with their dependencies, this series included.

Patches 1 to 8 simply fix some bugs and improve existing IR
manipulation interfaces to make them more consistent across back-ends.
Patches 19 to 21 introduce the builder interface that can be used to
construct i965 IR regardless of the back-end in use.  In combination
with the representation defined in patch 11 for vectors of FS scalar
registers it allows consistent generation of vector code on either
back-end with implicit scalarization in the FS case, or it can be used
to generate scalar or natural vector width code on either back-end
when that's sufficient.

Patches 14 to 18 define some helper functions that perform simple
transformations on instructions with a compatible interface across
back-ends.  Patch 12 provides a mechanism complementary to the builder
interface to query static properties of the IR -- This is especially
useful while performing back-end-independent transformations on the
program, but is also sometimes required to generate IR.

[1] http://cgit.freedesktop.org/~currojerez/mesa/log/?h=image-load-store

src/mesa/drivers/dri/i965/Makefile.sources   |    3 +
src/mesa/drivers/dri/i965/brw_fs.cpp         |   10 +-
src/mesa/drivers/dri/i965/brw_fs_builder.h   | 1108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |   17 ++-
src/mesa/drivers/dri/i965/brw_ir_fs.h        |  151 ++++++++++++++++++++--
src/mesa/drivers/dri/i965/brw_ir_svec4.h     |  489 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_ir_vec4.h      |  198 ++++++++++++++++++++++++++++-
src/mesa/drivers/dri/i965/brw_shader.h       |   35 +++++
src/mesa/drivers/dri/i965/brw_vec4.cpp       |   10 ++
src/mesa/drivers/dri/i965/brw_vec4_builder.h |  664 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
10 files changed, 2660 insertions(+), 25 deletions(-)

[PATCH 01/21] i965/fs: Fix passing an immediate to half().
[PATCH 02/21] i965/fs: Fix offset() for registers with zero stride.
[PATCH 03/21] i965/fs: Rename component() to channel().
[PATCH 04/21] i965/fs: Fix channel vs. component usage in a comment.
[PATCH 05/21] i965/fs: Have channel() set the register stride to zero.
[PATCH 06/21] i965: Add helper function to get a vector component of some register.
[PATCH 07/21] i965: Add resize() register helper function.
[PATCH 08/21] i965/vec4: Make src_reg conversion constructor from dst_reg implicit.
[PATCH 09/21] i965: Define an array register object.
[PATCH 10/21] i965: Add register constructors taking an array_reg as argument.
[PATCH 11/21] i965/fs: Define scalarizing VEC4 pseudo-IR.
[PATCH 12/21] i965: Define register trait structures.
[PATCH 13/21] i965: Document the offset() function.
[PATCH 14/21] i965: Define consistent interface to disable control flow execution masking.
[PATCH 15/21] i965: Define consistent interface to predicate an instruction.
[PATCH 16/21] i965: Define consistent interface to enable instruction conditional modifiers.
[PATCH 17/21] i965: Define consistent interface to enable instruction result saturation.
[PATCH 18/21] i965: Define consistent interface to perform cross-component flag result reduction.
[PATCH 19/21] i965/fs: Introduce FS IR builder.
[PATCH 20/21] i965/fs: Introduce scalarizing SVEC4 IR builder.
[PATCH 21/21] i965/vec4: Introduce VEC4 IR builder.