[Mesa-dev] [PATCH v2 10/11] i965/fs: Implement support for ir_barrier

[Jordan Justen]

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Chris Forbes <chrisf at ijw.co.nz>
---
 src/mesa/drivers/dri/i965/brw_defines.h        |  5 +++++
 src/mesa/drivers/dri/i965/brw_fs.h             |  3 +++
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 11 +++++++++++
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 27 +++++++++++++++++++++++++-
 src/mesa/drivers/dri/i965/brw_shader.cpp       |  3 +++
 5 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 719db68..4ef1dba 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1108,6 +1108,11 @@ enum opcode {
     * Terminate the compute shader.
     */
    CS_OPCODE_CS_TERMINATE,
+
+   /**
+    * GLSL barrier()
+    */
+   SHADER_OPCODE_BARRIER,
 };
 
 enum brw_urb_write_flags {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 5dfa1dc..ae419ac 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -401,6 +401,8 @@ public:
    void emit_cs_terminate();
    fs_reg *emit_cs_local_invocation_id_setup();
 
+   void emit_barrier();
+
    void emit_shader_time_begin();
    void emit_shader_time_end();
    fs_inst *SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value);
@@ -570,6 +572,7 @@ private:
    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
+   void generate_barrier(fs_inst *inst, struct brw_reg src);
    void generate_blorp_fb_write(fs_inst *inst);
    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 			 struct brw_reg *src);
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 114f938..9e1f391 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -401,6 +401,13 @@ fs_generator::generate_cs_terminate(fs_inst *inst, struct brw_reg payload)
 }
 
 void
+fs_generator::generate_barrier(fs_inst *inst, struct brw_reg src)
+{
+   brw_barrier(p, src);
+   brw_WAIT(p);
+}
+
+void
 fs_generator::generate_blorp_fb_write(fs_inst *inst)
 {
    brw_fb_WRITE(p,
@@ -2108,6 +2115,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
 	 generate_cs_terminate(inst, src[0]);
 	 break;
 
+      case SHADER_OPCODE_BARRIER:
+	 generate_barrier(inst, src[0]);
+	 break;
+
       default:
          unreachable("Unsupported opcode");
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 90f42e7..5e0c2fa 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -3230,7 +3230,32 @@ fs_visitor::visit(ir_end_primitive *)
 void
 fs_visitor::visit(ir_barrier *)
 {
-   unreachable("Not implemented!");
+   emit_barrier();
+}
+
+void
+fs_visitor::emit_barrier()
+{
+   assert(brw->gen >= 7);
+
+   /* We are getting the barrier ID from the compute shader header */
+   assert(stage == MESA_SHADER_COMPUTE);
+
+   fs_reg payload = fs_reg(GRF, alloc.allocate(1), BRW_REGISTER_TYPE_UD);
+
+   /* Clear the message payload */
+   fs_inst *inst = emit(MOV(payload, fs_reg(0u)));
+   inst->force_writemask_all = true;
+
+   /* Copy bits 27:24 of r0.2 (barrier id) to the message payload reg.2 */
+   fs_reg r0_2 = fs_reg(retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD));
+   inst = emit(AND(component(payload, 2), r0_2, fs_reg(0x0f000000u)));
+   inst->force_writemask_all = true;
+
+   /* Emit a gateway "barrier" message using the payload we set up, followed
+    * by a wait instruction.
+    */
+   emit(SHADER_OPCODE_BARRIER, reg_undef, payload);
 }
 
 void
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 9b48c8d..58b5846 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -617,6 +617,8 @@ brw_instruction_name(enum opcode op)
       return "gs_ff_sync_set_primitives";
    case CS_OPCODE_CS_TERMINATE:
       return "cs_terminate";
+   case SHADER_OPCODE_BARRIER:
+      return "barrier";
    }
 
    unreachable("not reached");
@@ -1041,6 +1043,7 @@ backend_instruction::has_side_effects() const
    case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
    case SHADER_OPCODE_URB_WRITE_SIMD8:
    case FS_OPCODE_FB_WRITE:
+   case SHADER_OPCODE_BARRIER:
       return true;
    default:
       return false;
-- 
2.1.4