[Mesa-dev] [PATCH v2 19/20] i965/cs: Upload brw_cs_state

[Kenneth Graunke]

On Friday, April 24, 2015 04:33:11 PM Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_cs.cpp         | 80 ++++++++++++++++++++++++++++
>  src/mesa/drivers/dri/i965/brw_defines.h      |  3 ++
>  src/mesa/drivers/dri/i965/brw_state.h        |  1 +
>  src/mesa/drivers/dri/i965/brw_state_upload.c |  2 +
>  4 files changed, 86 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa/drivers/dri/i965/brw_cs.cpp
> index ea74bf1..3f378a1 100644
> --- a/src/mesa/drivers/dri/i965/brw_cs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
> @@ -298,3 +298,83 @@ brw_cs_precompile(struct gl_context *ctx,
>  
>     return success;
>  }
> +
> +
> +static void
> +brw_upload_cs_state(struct brw_context *brw)
> +{
> +   if (!brw->cs.prog_data)
> +      return;
> +
> +   uint32_t offset;
> +   uint32_t *desc = (uint32_t*) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> +                                                8 * 4, 64, &offset);
> +   struct brw_stage_state *stage_state = &brw->cs.base;
> +   struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data;
> +   struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
> +
> +   uint32_t *bind = (uint32_t*) brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
> +                                            prog_data->binding_table.size_bytes,
> +                                            32, &stage_state->bind_bo_offset);
> +
> +   uint32_t dwords = brw->gen < 8 ? 8 : 9;
> +   BEGIN_BATCH(dwords);
> +   OUT_BATCH(MEDIA_VFE_STATE << 16 | (dwords - 2));
> +
> +   if (prog_data->total_scratch) {
> +      if (brw->gen >= 8)
> +         OUT_RELOC64(stage_state->scratch_bo,
> +                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
> +                     ffs(prog_data->total_scratch) - 11);
> +      else
> +         OUT_RELOC(stage_state->scratch_bo,
> +                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
> +                   ffs(prog_data->total_scratch) - 11);
> +   } else {
> +      OUT_BATCH(0);
> +      if (brw->gen >= 8)
> +         OUT_BATCH(0);
> +   }
> +
> +   OUT_BATCH(((brw->max_cs_threads - 1) << 16) |
> +             (brw->gen >= 8 ? (2 << 8) : 0) |
> +             (brw->gen >= 8 ? 0xc0 : 0xc4));
> +
> +   OUT_BATCH(0);
> +   OUT_BATCH(brw->gen >= 8 ? (2 << 16) : 0);

Perhaps add #defines for some of these values?

> +   OUT_BATCH(0);
> +   OUT_BATCH(0);
> +   OUT_BATCH(0);
> +   ADVANCE_BATCH();
> +
> +   /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
> +   memcpy(bind, stage_state->surf_offset,
> +          prog_data->binding_table.size_bytes);
> +
> +   memset(desc, 0, 8 * 4);
> +
> +   int dw = 0;
> +   desc[dw++] = brw->cs.base.prog_offset;
> +   if (brw->gen >= 8)
> +      dw++; /* Kernel Start Pointer High */
> +   dw++;
> +   dw++;
> +   desc[dw++] = stage_state->bind_bo_offset;
> +

Could we just set desc[0], desc[1], etc. directly rather than having a
variable we increment?  That seems simpler to me, and matches what we do
elsewhere in the code.

> +   BEGIN_BATCH(4);
> +   OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2));
> +   OUT_BATCH(0);
> +   OUT_BATCH(8 * 4);
> +   OUT_BATCH(offset);
> +   ADVANCE_BATCH();
> +}
> +
> +
> +extern "C"
> +const struct brw_tracked_state brw_cs_state = {
> +   .dirty = {
> +      .mesa  = 0,
> +      .brw   = BRW_NEW_COMPUTE_PROGRAM,

I actually don't see brw->compute_program or ctx->Shader accesses, which
would be covered by BRW_NEW_COMPUTE_PROGRAM.  brw->cs.prog_data should
be covered by BRW_NEW_CS_PROG_DATA - I think you want that instead?
(Or, at least, in addition?)

> +   },
> +   .emit = brw_upload_cs_state
> +};
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index f6f8962..36f46af 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -2449,4 +2449,7 @@ enum brw_wm_barycentric_interp_mode {
>  #define SKL_MOCS_WB 9
>  #define SKL_MOCS_WT 5
>  
> +#define MEDIA_VFE_STATE                         0x7000
> +#define MEDIA_INTERFACE_DESCRIPTOR_LOAD         0x7002
> +
>  #endif
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
> index cfa67b6..c3a86e6 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -93,6 +93,7 @@ extern const struct brw_tracked_state brw_drawing_rect;
>  extern const struct brw_tracked_state brw_indices;
>  extern const struct brw_tracked_state brw_vertices;
>  extern const struct brw_tracked_state brw_index_buffer;
> +extern const struct brw_tracked_state brw_cs_state;
>  extern const struct brw_tracked_state gen6_binding_table_pointers;
>  extern const struct brw_tracked_state gen6_blend_state;
>  extern const struct brw_tracked_state gen6_cc_state_pointers;
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index d086f39..7d0dc8f 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -249,6 +249,7 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
>  
>  static const struct brw_tracked_state *gen7_compute_atoms[] =
>  {
> +   &brw_cs_state,
>  };
>  
>  static const struct brw_tracked_state *gen8_render_atoms[] =
> @@ -329,6 +330,7 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
>  
>  static const struct brw_tracked_state *gen8_compute_atoms[] =
>  {
> +   &brw_cs_state,
>  };
>  
>  static void
> 
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