[Mesa-dev] [PATCH V2 14/22] i965/gen9: Set vertical and horizontal surface alignments

[Anuj Phogat]

On Thu, Apr 23, 2015 at 6:05 PM, Pohjolainen, Topi
<topi.pohjolainen at intel.com> wrote:
> On Fri, Apr 17, 2015 at 04:51:35PM -0700, Anuj Phogat wrote:
>> Patch sets the alignments for texture and renderbuffer surfaces.
>>
>> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
>> ---
>>  src/mesa/drivers/dri/i965/gen8_surface_state.c | 34 +++++++++++++++++++++++---
>>  1 file changed, 30 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> index 1ec57c0..189f1db 100644
>> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> @@ -218,10 +218,23 @@ gen8_update_texture_surface(struct gl_context *ctx,
>>
>>     surf[0] = surf_type << BRW_SURFACE_TYPE_SHIFT |
>>               tex_format << BRW_SURFACE_FORMAT_SHIFT |
>> -             vertical_alignment(mt) |
>> -             horizontal_alignment(mt) |
>>               tiling_mode;
>>
>> +   if (brw->gen < 9) {
>> +         surf[0] |=  horizontal_alignment(mt) | vertical_alignment(mt);
>> +   }
>> +   /* Horizontal alignment is ignored when Tiled Resource Mode is not
>> +    * TRMODE_NONE. Vertical alignment is ignored for 1D surfaces and when
>> +    * Tiled Resource Mode is not TRMODE_NONE.
>> +    */
>> +   else if (tr_mode == GEN9_SURFACE_TRMODE_NONE) {
>> +      if (!gen9_use_linear_1d_layout(brw, mt))
>> +         surf[0] |=  horizontal_alignment(mt);
>> +
>> +      if (surf_type != BRW_SURFACE_1D)
>> +         surf[0] |=  vertical_alignment(mt);
>> +   }
>
> Wouldn't it be cleaner to patch both horizontal_alignment() and
> vertical_alignment() passing them the additional information as extra
> arguments?
>
Yes, It'll be. Thanks for the suggestion. Will send out the V3.
>> +
>>     if (surf_type == BRW_SURFACE_CUBE) {
>>        surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
>>     }
>> @@ -400,10 +413,23 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
>>     surf[0] = (surf_type << BRW_SURFACE_TYPE_SHIFT) |
>>               (is_array ? GEN7_SURFACE_IS_ARRAY : 0) |
>>               (format << BRW_SURFACE_FORMAT_SHIFT) |
>> -             vertical_alignment(mt) |
>> -             horizontal_alignment(mt) |
>>               surface_tiling_mode(tiling);
>>
>> +   if (brw->gen < 9) {
>> +         surf[0] |=  horizontal_alignment(mt) | vertical_alignment(mt);
>> +   }
>> +   /* Horizontal alignment is ignored when Tiled Resource Mode is not
>> +    * TRMODE_NONE. Vertical alignment is ignored for 1D surfaces and when
>> +    * Tiled Resource Mode is not TRMODE_NONE.
>> +    */
>> +   else if (tr_mode == GEN9_SURFACE_TRMODE_NONE) {
>> +      if (!gen9_use_linear_1d_layout(brw, mt))
>> +         surf[0] |=  horizontal_alignment(mt);
>> +
>> +      if (surf_type != BRW_SURFACE_1D)
>> +         surf[0] |=  vertical_alignment(mt);
>> +   }
>> +
>>     surf[1] = SET_FIELD(mocs, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
>>
>>     surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
>> --
>> 2.3.4
>>
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