[Mesa-dev] [PATCH V2 18/22] i965/skl: Modify the conditions to use blitter on skl+

[Pohjolainen, Topi]

On Fri, Apr 17, 2015 at 04:51:39PM -0700, Anuj Phogat wrote:
> Conditions modified allow skl+ to use blitter:
>  - for all tiling formats
>  - to write data to YF/YS tiled surfaces
> 
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index e547544..2d218b4 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -2518,13 +2518,17 @@ use_intel_mipree_map_blit(struct brw_context *brw,
>  {
>     if (brw->has_llc &&
>        /* It's probably not worth swapping to the blit ring because of
> -       * all the overhead involved.
> +       * all the overhead involved. But, we must use blitter for the
> +       * surfaces with INTEL_MIPTREE_TRMODE_{YF,YS}.
>         */
> -       !(mode & GL_MAP_WRITE_BIT) &&
> +       (!(mode & GL_MAP_WRITE_BIT) ||
> +        mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) &&
>         !mt->compressed &&
>         (mt->tiling == I915_TILING_X ||
>          /* Prior to Sandybridge, the blitter can't handle Y tiling */
> -        (brw->gen >= 6 && mt->tiling == I915_TILING_Y)) &&
> +        (brw->gen >= 6 && mt->tiling == I915_TILING_Y) ||
> +        /* XY_FAST_COPY_BLT on Skylake also supports YF/YS tiling */
> +        brw->gen >= 9) &&
 
Indent these two lines by one space, the condition here is part of the
preceeding OR.

With that:

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

>         can_blit_slice(mt, level, slice))
>        return true;
>  
> @@ -2591,6 +2595,8 @@ intel_miptree_map(struct brw_context *brw,
>        intel_miptree_map_movntdqa(brw, mt, map, level, slice);
>  #endif
>     } else {
> +      /* Yf/Ys tiled surfaces can't be mapped using GTT. */
> +      assert(mt->tr_mode == INTEL_MIPTREE_TRMODE_NONE);
>        intel_miptree_map_gtt(brw, mt, map, level, slice);
>     }
>  
> -- 
> 2.3.4
> 
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