[Mesa-dev] [PATCH V2 06/22] i965/gen9: Set tiled resource mode for the miptree

Pohjolainen, Topi topi.pohjolainen at intel.com
Thu Apr 23 16:51:41 PDT 2015


On Fri, Apr 17, 2015 at 04:51:27PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> ---
>  src/mesa/drivers/dri/i965/brw_tex_layout.c    | 2 ++
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index 68c6634..19ff5b8 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -540,6 +540,8 @@ brw_miptree_layout(struct brw_context *brw,
>  {
>     bool gen6_hiz_or_stencil = false;
>  
> +   mt->tr_mode = INTEL_MIPTREE_TRMODE_NONE;
> +
>     if (brw->gen == 6 && mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
>        const GLenum base_format = _mesa_get_format_base_format(mt->format);
>        gen6_hiz_or_stencil = _mesa_is_depth_or_stencil_format(base_format);
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index b03ffe7..2669817 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -338,6 +338,7 @@ struct intel_mipmap_tree
>     uint32_t pitch; /**< pitch in bytes. */
>  
>     uint32_t tiling; /**< One of the I915_TILING_* flags */
> +   uint32_t tr_mode; /**< One of the INTEL_MIPTREE_TRMODE_* flags */
>  
>     /* Effectively the key:
>      */
> @@ -503,6 +504,11 @@ enum intel_miptree_tiling_mode {
>     INTEL_MIPTREE_TILING_NONE,
>  };
>  
> +/* Tile resource modes */
> +#define   INTEL_MIPTREE_TRMODE_NONE    0
> +#define   INTEL_MIPTREE_TRMODE_YF      1
> +#define   INTEL_MIPTREE_TRMODE_YS      2
> +

I think we can use an enum here. We don't do that for tiling but those
are readily shifted values to go into batches. These values here are
instead used only by software to make runtime decisions. Enumeration
gives us compiler warning support and debugger giving the human readable
value instead of just number.

With that:

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

>  bool
>  intel_is_non_msrt_mcs_buffer_supported(struct brw_context *brw,
>                                         struct intel_mipmap_tree *mt);
> -- 
> 2.3.4
> 
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