[Mesa-dev] [PATCH 08/16] i965/blorp: Add support for layered rendering

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp  | 6 ++++--
 src/mesa/drivers/dri/i965/brw_blorp.h    | 4 +++-
 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 +-
 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +-
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 8f82851..b404869 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -156,7 +156,8 @@ brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x,
 
 
 brw_blorp_params::brw_blorp_params(unsigned num_varyings,
-                                   unsigned num_draw_buffers)
+                                   unsigned num_draw_buffers,
+                                   unsigned num_layers)
    : x0(0),
      y0(0),
      x1(0),
@@ -165,7 +166,8 @@ brw_blorp_params::brw_blorp_params(unsigned num_varyings,
      hiz_op(GEN6_HIZ_OP_NONE),
      use_wm_prog(false),
      num_varyings(num_varyings),
-     num_draw_buffers(num_draw_buffers)
+     num_draw_buffers(num_draw_buffers),
+     num_layers(num_layers)
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index fe1c24a..695414a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -212,7 +212,8 @@ class brw_blorp_params
 {
 public:
    brw_blorp_params(unsigned num_varyings = 0,
-                    unsigned num_draw_buffers = 1);
+                    unsigned num_draw_buffers = 1,
+                    unsigned num_layers = 1);
 
    virtual uint32_t get_wm_prog(struct brw_context *brw,
                                 brw_blorp_prog_data **prog_data) const = 0;
@@ -230,6 +231,7 @@ public:
    brw_blorp_wm_push_constants wm_push_consts;
    const unsigned num_varyings;
    const unsigned num_draw_buffers;
+   const unsigned num_layers;
 };
 
 
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index 2bec265..4f4d752 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -992,7 +992,7 @@ gen6_blorp_emit_primitive(struct brw_context *brw,
              GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL);
    OUT_BATCH(3); /* vertex count per instance */
    OUT_BATCH(0);
-   OUT_BATCH(1); /* instance count */
+   OUT_BATCH(params->num_layers); /* instance count */
    OUT_BATCH(0);
    OUT_BATCH(0);
    ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 3065a4c..2bdc82b 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -753,7 +753,7 @@ gen7_blorp_emit_primitive(struct brw_context *brw,
              _3DPRIM_RECTLIST);
    OUT_BATCH(3); /* vertex count per instance */
    OUT_BATCH(0);
-   OUT_BATCH(1); /* instance count */
+   OUT_BATCH(params->num_layers); /* instance count */
    OUT_BATCH(0);
    OUT_BATCH(0);
    ADVANCE_BATCH();
-- 
1.9.3