[Mesa-dev] [PATCH 14/18] i965/wm/gen6: Refactor program offset setup

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_state.h     |  8 +++++
 src/mesa/drivers/dri/i965/gen6_wm_state.c | 56 ++++++++++++++++++-------------
 2 files changed, 41 insertions(+), 23 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 23f36c0..ca3274d 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -292,6 +292,14 @@ void brw_update_sampler_state(struct brw_context *brw,
                               uint32_t *sampler_state,
                               uint32_t batch_offset_for_sampler_state);
 
+/* gen6_wm_state.c */
+void
+gen6_wm_state_set_programs(const struct brw_wm_prog_data *prog_data,
+                           const struct brw_stage_state *stage_state,
+                           int min_inv_per_frag,
+                           uint32_t *ksp0, uint32_t *ksp2,
+                           uint32_t *dw4, uint32_t *dw5, uint32_t *dw6);
+
 /* gen6_sf_state.c */
 void
 calculate_attr_overrides(const struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 8e673a4..bc921e5 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -65,6 +65,37 @@ const struct brw_tracked_state gen6_wm_push_constants = {
    .emit = gen6_upload_wm_push_constants,
 };
 
+void
+gen6_wm_state_set_programs(const struct brw_wm_prog_data *prog_data,
+                           const struct brw_stage_state *stage_state,
+                           int min_inv_per_frag,
+                           uint32_t *ksp0, uint32_t *ksp2,
+                           uint32_t *dw4, uint32_t *dw5, uint32_t *dw6)
+{
+   if (prog_data->prog_offset_16 || prog_data->no_8) {
+      *dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
+
+      if (!prog_data->no_8 && min_inv_per_frag == 1) {
+         *dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
+         *dw4 |= (prog_data->base.dispatch_grf_start_reg <<
+                  GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+         *dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
+                  GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
+         *ksp0 = stage_state->prog_offset;
+         *ksp2 = stage_state->prog_offset + prog_data->prog_offset_16;
+      } else {
+         *dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
+                  GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+         *ksp0 = stage_state->prog_offset + prog_data->prog_offset_16;
+      }
+   } else {
+      *dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
+      *dw4 |= (prog_data->base.dispatch_grf_start_reg <<
+               GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+      *ksp0 = stage_state->prog_offset;
+   }
+}
+
 static void
 upload_wm_state(struct brw_context *brw)
 {
@@ -135,29 +166,8 @@ upload_wm_state(struct brw_context *brw)
       _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
    assert(min_inv_per_frag >= 1);
 
-   if (prog_data->prog_offset_16 || prog_data->no_8) {
-      dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
-
-      if (!prog_data->no_8 && min_inv_per_frag == 1) {
-         dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
-         dw4 |= (prog_data->base.dispatch_grf_start_reg <<
-                 GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
-         dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
-                 GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
-         ksp0 = brw->wm.base.prog_offset;
-         ksp2 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
-      } else {
-         dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
-                GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
-         ksp0 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
-      }
-   }
-   else {
-      dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
-      dw4 |= (prog_data->base.dispatch_grf_start_reg <<
-              GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
-      ksp0 = brw->wm.base.prog_offset;
-   }
+   gen6_wm_state_set_programs(prog_data, &brw->wm.base, min_inv_per_frag,
+                              &ksp0, &ksp2, &dw4, &dw5, &dw6);
 
    /* BRW_NEW_FS_PROG_DATA | _NEW_COLOR */
    if (prog_data->dual_src_blend &&
-- 
1.9.3