[Mesa-dev] i965: Batch emission refactoring
Topi Pohjolainen
topi.pohjolainen at intel.com
Wed Apr 22 13:47:20 PDT 2015
Currently batch emission logic is bolted into using the current
gl-state and currently bound user shader programs as input. This
series refactors the api to allow caller to give individual bits of
information needed explicitly instead of the emission logic
deducing them from the current state.
This is needed to support blorp style gl-state-agnostic launching
of internal utility shaders - shaders used for 2D blitting and
buffer clearing/resolving.
I have a follow-up series ready that is actually leveraging this,
this series is simple set of refactors. I didn't mean it to, but
it actually fixes one pigit test on ILK due to the way formats
are set for texture surfaces: arb_copy_image.arb_copy_image-formats.
Patches 6-13 all address texture surface setup. They move all the
decision making of values into the hardware agnostic dispatcher
leaving the hw-specific part just to deal with formatting.
Topi Pohjolainen (18):
i965: Refactor rb surface setup to allow caller to store offsets
i965: Expose and refactor brw_update_renderbuffer_surfaces()
i965: Refactor and expose brw_upload_binding_table()
i965: Remove dependency to tex object in default color setup
i965: Refactor sampler state setup
i965: Move texture buffer dispatch into single location
i965/gen8: Use miptree format in the surface setup
i965: Move tex miptree and format resolving into dispatcher
i965: Move texture swizzle resolving into dispatcher
i965: Pass integer format flag as parameter to surface setup
i965: Refactor effective depth calculation
i965: Pass texture target as parameter for surface setup
i965: Pass slice details as parameters for surface setup
i965/wm/gen6: Refactor program offset setup
i965/wm/gen6: Refactor push constant state uploading
i965/ps/gen7: Refactor state uploading
i965/ps/gen8: Refactor state uploading
i965/gen8: Expose state base address setup
src/mesa/drivers/dri/i965/brw_binding_tables.c | 21 ++-
src/mesa/drivers/dri/i965/brw_context.h | 22 +--
src/mesa/drivers/dri/i965/brw_sampler_state.c | 74 +++++----
src/mesa/drivers/dri/i965/brw_state.h | 58 +++++++
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 183 ++++++++++++++--------
src/mesa/drivers/dri/i965/gen6_surface_state.c | 17 +-
src/mesa/drivers/dri/i965/gen6_wm_state.c | 102 +++++++-----
src/mesa/drivers/dri/i965/gen7_wm_state.c | 58 ++++---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 83 +++-------
src/mesa/drivers/dri/i965/gen8_misc_state.c | 4 +-
src/mesa/drivers/dri/i965/gen8_ps_state.c | 74 +++++----
src/mesa/drivers/dri/i965/gen8_surface_state.c | 84 +++-------
12 files changed, 454 insertions(+), 326 deletions(-)
--
1.9.3
More information about the mesa-dev
mailing list