[Mesa-dev] [PATCH 03/18] i965: Refactor and expose brw_upload_binding_table()

[Topi Pohjolainen]

Read and write parts of the state stage are also split into
explicit arguments allowing future patches to use constant
program data.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_binding_tables.c | 21 ++++++++++++++-------
 src/mesa/drivers/dri/i965/brw_state.h          |  7 +++++++
 2 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 459165a..1142c67 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -50,15 +50,13 @@
  * This copies brw_stage_state::surf_offset[] into the indirect state section
  * of the batchbuffer (allocated by brw_state_batch()).
  */
-static void
+void
 brw_upload_binding_table(struct brw_context *brw,
                          uint32_t packet_name,
                          GLbitfield brw_new_binding_table,
+                         const struct brw_stage_prog_data *prog_data,
                          struct brw_stage_state *stage_state)
 {
-   /* BRW_NEW_*_PROG_DATA */
-   struct brw_stage_prog_data *prog_data = stage_state->prog_data;
-
    if (prog_data->binding_table.size_bytes == 0) {
       /* There are no surfaces; skip making the binding table altogether. */
       if (stage_state->bind_bo_offset == 0 && brw->gen < 9)
@@ -103,9 +101,12 @@ brw_upload_binding_table(struct brw_context *brw,
 static void
 brw_vs_upload_binding_table(struct brw_context *brw)
 {
+   /* BRW_NEW_VS_PROG_DATA */
+   const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
    brw_upload_binding_table(brw,
                             _3DSTATE_BINDING_TABLE_POINTERS_VS,
-                            BRW_NEW_VS_BINDING_TABLE, &brw->vs.base);
+                            BRW_NEW_VS_BINDING_TABLE, prog_data,
+                            &brw->vs.base);
 }
 
 const struct brw_tracked_state brw_vs_binding_table = {
@@ -124,9 +125,12 @@ const struct brw_tracked_state brw_vs_binding_table = {
 static void
 brw_upload_wm_binding_table(struct brw_context *brw)
 {
+   /* BRW_NEW_WM_PROG_DATA */
+   const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
    brw_upload_binding_table(brw,
                             _3DSTATE_BINDING_TABLE_POINTERS_PS,
-                            BRW_NEW_PS_BINDING_TABLE, &brw->wm.base);
+                            BRW_NEW_PS_BINDING_TABLE, prog_data,
+                            &brw->wm.base);
 }
 
 const struct brw_tracked_state brw_wm_binding_table = {
@@ -147,9 +151,12 @@ brw_gs_upload_binding_table(struct brw_context *brw)
    if (brw->geometry_program == NULL)
       return;
 
+   /* BRW_NEW_GS_PROG_DATA */
+   const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
    brw_upload_binding_table(brw,
                             _3DSTATE_BINDING_TABLE_POINTERS_GS,
-                            BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
+                            BRW_NEW_GS_BINDING_TABLE, prog_data,
+                            &brw->gs.base);
 }
 
 const struct brw_tracked_state brw_gs_binding_table = {
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 83058b9..8798369 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -159,6 +159,13 @@ brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags)
            (brw->ctx.NewDriverState & brw_flags)) != 0;
 }
 
+/* brw_binding_tables.c */
+void brw_upload_binding_table(struct brw_context *brw,
+                              uint32_t packet_name,
+                              GLbitfield brw_new_binding_table,
+                              const struct brw_stage_prog_data *prog_data,
+                              struct brw_stage_state *stage_state);
+
 /* brw_misc_state.c */
 void brw_upload_invariant_state(struct brw_context *brw);
 uint32_t
-- 
1.9.3