[Mesa-dev] [PATCH] i965: Remove end-of-thread SEND alignment code.

[Matt Turner]

This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit 077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.

In fact, the BSpec says

   - "[Nop and Illegal] cannot be compressed."; and
   - "Currently, there is no need for between-instruction padding."
---
 src/mesa/drivers/dri/i965/brw_eu_compact.c | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 26c41ea..72adbe0 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -1398,19 +1398,11 @@ brw_compact_instructions(struct brw_compile *p, int start_offset,
 
          offset += sizeof(brw_compact_inst);
       } else {
-         /* It appears that the end of thread SEND instruction needs to be
-          * aligned, or the GPU hangs. All uncompacted instructions need to be
-          * aligned on G45.
-          */
-         if ((offset & sizeof(brw_compact_inst)) != 0 &&
-             (((brw_inst_opcode(brw, src) == BRW_OPCODE_SEND ||
-                brw_inst_opcode(brw, src) == BRW_OPCODE_SENDC) &&
-               brw_inst_eot(brw, src)) ||
-              brw->is_g4x)) {
+         /* All uncompacted instructions need to be aligned on G45. */
+         if ((offset & sizeof(brw_compact_inst)) != 0 && brw->is_g4x){
             brw_compact_inst *align = store + offset;
             memset(align, 0, sizeof(*align));
-            brw_compact_inst_set_opcode(align, brw->is_g4x ? BRW_OPCODE_NENOP :
-                                                             BRW_OPCODE_NOP);
+            brw_compact_inst_set_opcode(align, BRW_OPCODE_NENOP);
             brw_compact_inst_set_cmpt_control(align, true);
             offset += sizeof(brw_compact_inst);
             compacted_count--;
-- 
2.0.5