[Mesa-dev] [PATCH v2 2/3] i965: Add support for double-precision floating-point types on Gen8+.
Darius Goad
alegend45 at gmail.com
Sat Apr 11 10:57:07 PDT 2015
---
src/mesa/drivers/dri/i965/brw_reg.h | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 19 +++++++++++++------
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 924b059..143a667 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -252,6 +252,7 @@ struct brw_reg {
} bits;
float f;
+ double df;
int d;
unsigned ud;
} dw1;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 7a5f7978..9bb3943 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -585,6 +585,7 @@ brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg)
unsigned ud;
int d;
float f;
+ double df;
} imm = { reg->dw1.ud }, sat_imm = { 0 };
switch (type) {
@@ -603,6 +604,9 @@ brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg)
case BRW_REGISTER_TYPE_F:
sat_imm.f = CLAMP(imm.f, 0.0f, 1.0f);
break;
+ case BRW_REGISTER_TYPE_DF:
+ sat_imm.df = CLAMP(imm.df, 0.0f, 1.0f);
+ break;
case BRW_REGISTER_TYPE_UB:
case BRW_REGISTER_TYPE_B:
unreachable("no UB/B immediates");
@@ -610,9 +614,8 @@ brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg)
case BRW_REGISTER_TYPE_UV:
case BRW_REGISTER_TYPE_VF:
unreachable("unimplemented: saturate vector immediate");
- case BRW_REGISTER_TYPE_DF:
case BRW_REGISTER_TYPE_HF:
- unreachable("unimplemented: saturate DF/HF immediate");
+ unreachable("unimplemented: saturate -HF immediate");
}
if (imm.ud != sat_imm.ud) {
@@ -637,6 +640,9 @@ brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg)
case BRW_REGISTER_TYPE_F:
reg->dw1.f = -reg->dw1.f;
return true;
+ case BRW_REGISTER_TYPE_DF:
+ reg->dw1.df = -reg->dw1.df;
+ return true;
case BRW_REGISTER_TYPE_VF:
reg->dw1.ud ^= 0x80808080;
return true;
@@ -649,9 +655,8 @@ brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg)
case BRW_REGISTER_TYPE_UQ:
case BRW_REGISTER_TYPE_Q:
assert(!"unimplemented: negate UQ/Q immediate");
- case BRW_REGISTER_TYPE_DF:
case BRW_REGISTER_TYPE_HF:
- assert(!"unimplemented: negate DF/HF immediate");
+ assert(!"unimplemented: negate HF immediate");
}
return false;
@@ -670,6 +675,9 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg)
case BRW_REGISTER_TYPE_F:
reg->dw1.f = fabsf(reg->dw1.f);
return true;
+ case BRW_REGISTER_TYPE_DF:
+ reg->dw1.df = fabsd(reg->dw1.df);
+ return true;
case BRW_REGISTER_TYPE_VF:
reg->dw1.ud &= ~0x80808080;
return true;
@@ -688,9 +696,8 @@ brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg)
assert(!"unimplemented: abs V immediate");
case BRW_REGISTER_TYPE_Q:
assert(!"unimplemented: abs Q immediate");
- case BRW_REGISTER_TYPE_DF:
case BRW_REGISTER_TYPE_HF:
- assert(!"unimplemented: abs DF/HF immediate");
+ assert(!"unimplemented: abs HF immediate");
}
return false;
--
2.1.4
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