[Mesa-dev] [RFC 0/2] nir and ttn support for indirect/arrays

Rob Clark robdclark at gmail.com
Tue Apr 7 08:52:02 PDT 2015


From: Rob Clark <robclark at freedesktop.org>

Introduce intrinsics to load/store global vars (since I'm not sure what
the point is to have global as a var type if there is no way to access
it, but maybe I'm missing something), and update ttn to generate global
variables for arrays.

So, for example:

   FRAG
   PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
   DCL OUT[0], COLOR
   DCL CONST[0..1]
   DCL TEMP[0..2], ARRAY(1), LOCAL
   DCL TEMP[3..4], LOCAL
   DCL ADDR[0]
   IMM[0] FLT32 {    1.0000,     2.0000,     3.0000,     0.0000}
   IMM[1] FLT32 {    4.0000,     5.0000,     6.0000,     7.0000}
   IMM[2] FLT32 {    7.0000,     8.0000,     9.0000,     0.0000}
     0: MOV TEMP[0], IMM[0].xyzx
     1: MOV TEMP[1], IMM[1].xyzx
     2: MOV TEMP[2], IMM[2].xyzx
     3: UARL ADDR[0].x, CONST[0].xxxx
     4: FSEQ TEMP[3].xyz, TEMP[ADDR[0].x](1).xyzz, CONST[1].xyzz
     5: AND TEMP[3].y, TEMP[3].yyyy, TEMP[3].zzzz
     6: AND TEMP[3].x, TEMP[3].xxxx, TEMP[3].yyyy
     7: UCMP TEMP[4], TEMP[3].xxxx, IMM[0].wxwx, TEMP[4]
     8: NOT TEMP[3].x, TEMP[3].xxxx
     9: UCMP TEMP[4], TEMP[3].xxxx, IMM[0].xwwx, TEMP[4]
    10: MOV OUT[0], TEMP[4]
    11: END

becomes:

   decl_var uniform  vec4[2] uniform_0 (0, 0)
   decl_var shader_out  vec4 out_0 (1, 0)
   decl_overload main returning void
   
   impl main {
      block block_0:
      /* preds: */
      vec4 ssa_0 = load_const (0x3f800000 /* 1.000000 */, 0x40000000 /* 2.000000 */, 0x40400000 /* 3.000000 */, 0x00000000 /* 0.000000 */
      vec4 ssa_233 = load_const (0x3f800000 /* 1.000000 */, 0x40000000 /* 2.000000 */, 0x40400000 /* 3.000000 */, 0x3f800000 /* 1.000000 */
      intrinsic store_global (ssa_233) () (0, 1)
      vec4 ssa_234 = load_const (0x40800000 /* 4.000000 */, 0x40a00000 /* 5.000000 */, 0x40c00000 /* 6.000000 */, 0x40800000 /* 4.000000 */
      intrinsic store_global (ssa_234) () (1, 1)
      vec4 ssa_235 = load_const (0x40e00000 /* 7.000000 */, 0x41000000 /* 8.000000 */, 0x41100000 /* 9.000000 */, 0x40e00000 /* 7.000000 */
      intrinsic store_global (ssa_235) () (2, 1)
      vec4 ssa_18 = intrinsic load_uniform () () (0, 1)
      vec4 ssa_25 = intrinsic load_global_indirect (ssa_18) () (0, 1)
      vec4 ssa_27 = intrinsic load_uniform () () (1, 1)
      vec1 ssa_132 = feq ssa_25, ssa_27
      vec1 ssa_133 = feq ssa_25.y, ssa_27.y
      vec1 ssa_134 = feq ssa_25.z, ssa_27.z
      vec1 ssa_77 = iand ssa_133, ssa_134
      vec1 ssa_79 = iand ssa_132, ssa_77
      vec1 ssa_244 = bcsel ssa_79, ssa_0.w, ssa_0
      vec1 ssa_246 = bcsel ssa_79, ssa_0, ssa_0.w
      vec1 ssa_254 = load_const (0x00000000 /* 0.000000 */
      vec1 ssa_255 = load_const (0x3f800000 /* 1.000000 */
      vec4 ssa_230 = vec4 ssa_244, ssa_246, ssa_254, ssa_255
      intrinsic store_output (ssa_230) () (0, 1)
      /* succs: block_1 */
      block block_1:
   }

note, in one of the opt passes the 'decl_var  vec4[3] arr_1' is getting lost
but I haven't debugged that yet

Rob Clark (2):
  nir: add intrinsics for load/store global
  gallium/ttn: add support for temp arrays

 src/gallium/auxiliary/nir/tgsi_to_nir.c | 116 ++++++++++++++++++++++++++------
 src/glsl/nir/nir_intrinsics.h           |   7 +-
 2 files changed, 100 insertions(+), 23 deletions(-)

-- 
2.1.0



More information about the mesa-dev mailing list