[PATCH] drm/i915/mtl: Apply Wa_14017073508 for MTL SoC Step

[Gupta, Anshuman]

> -----Original Message-----
> From: Nilawar, Badal <badal.nilawar at intel.com>
> Sent: Friday, February 24, 2023 12:12 AM
> To: intel-gfx at lists.freedesktop.org
> Cc: Gupta, Anshuman <anshuman.gupta at intel.com>; Ewins, Jon
> <jon.ewins at intel.com>; Belgaumkar, Vinay <vinay.belgaumkar at intel.com>;
> Vivi, Rodrigo <rodrigo.vivi at intel.com>; Roper, Matthew D
> <matthew.d.roper at intel.com>; dri-devel at lists.freedesktop.org
> Subject: [PATCH] drm/i915/mtl: Apply Wa_14017073508 for MTL SoC Step
> 
> Apply Wa_14017073508 for MTL SoC die A step instead of graphics step.
> To get the SoC die stepping there is no direct interface so using revid as revid 0
> aligns with SoC die A step.
Bspec: 55413 has mapping of SoC die stepping with revid.
Please add that index well.  
> 
> Bspec: 55420
> 
> Fixes: 8f70f1ec587d ("drm/i915/mtl: Add Wa_14017073508 for SAMedia")
> Signed-off-by: Badal Nilawar <badal.nilawar at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c     | 4 ++--
>  drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index cef3d6f5c34e..4ba3c8c97ccc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -29,7 +29,7 @@
>  static void mtl_media_busy(struct intel_gt *gt)  {
>  	/* Wa_14017073508: mtl */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
A code comment to explain using revid would be better.
With that.
Reviewed-by: Anshuman Gupta <anshuman.gupta at intel.com>
>  	    gt->type == GT_MEDIA)
>  		snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
>  				  PCODE_MBOX_GT_STATE_MEDIA_BUSY,
> @@ -39,7 +39,7 @@ static void mtl_media_busy(struct intel_gt *gt)  static void
> mtl_media_idle(struct intel_gt *gt)  {
>  	/* Wa_14017073508: mtl */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
>  	    gt->type == GT_MEDIA)
>  		snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
> 
> PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY,
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> index fcf51614f9a4..7429c233ad45 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
> @@ -19,7 +19,7 @@ static bool __guc_rc_supported(struct intel_guc *guc)
>  	 * Do not enable gucrc to avoid additional interrupts which
>  	 * may disrupt pcode wa.
>  	 */
> -	if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
> +	if (IS_METEORLAKE(gt->i915) && INTEL_REVID(gt->i915) == 0 &&
>  	    gt->type == GT_MEDIA)
>  		return false;
> 
> --
> 2.25.1