[PATCH v2 2/2] drm: rcar-du: Write correct values in DORCR reserved fields

Tomi Valkeinen tomi.valkeinen at ideasonboard.com
Thu Feb 23 13:58:42 UTC 2023


On 23/02/2023 01:42, Laurent Pinchart wrote:
> The DORCR register controls the routing of clocks and data between DU
> channels within a group. For groups that contain a single channel,
> there's no routing option to control, and some fields of the register
> are then reserved. On Gen2 those reserved fields are documented as
> required to be set to 0, while on Gen3 and newer the PG1T, DK1S and PG1D
> reserved fields must be set to 1.
> 
> The DU driver initializes the DORCR register in rcar_du_group_setup(),
> where it ignores the PG1T, DK1S and PG1D, and then configures those
> fields to the correct value in rcar_du_group_set_routing(). This hasn't
> been shown to cause any issue, but prevents certifying that the driver
> complies with the documentation in safety-critical use cases.
> 
> As there is no reasonable change that the documentation will be updated
> to clarify that those reserved fields can be written to 0 temporarily
> before starting the hardware, make sure that the registers are always
> set to valid values.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas at ideasonboard.com>
> ---
>   drivers/gpu/drm/rcar-du/rcar_du_group.c | 10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)

Reviewed-by: Tomi Valkeinen <tomi.valkeinen at ideasonboard.com>

  Tomi



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