[PATCH 4/4] drm/msm/a5xx: fix context faults during ring switch

[Rob Clark]

On Mon, Feb 13, 2023 at 6:10 PM Dmitry Baryshkov
<dmitry.baryshkov at linaro.org> wrote:
>
> The rptr_addr is set in the preempt_init_ring(), which is called from
> a5xx_gpu_init(). It uses shadowptr() to set the address, however the
> shadow_iova is not yet initialized at that time. Move the rptr_addr
> setting to the a5xx_preempt_hw_init() which is called after setting the
> shadow_iova, getting the correct value for the address.
>
> Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7555

> Suggested-by: Rob Clark <robdclark at gmail.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> index 7e0affd60993..f58dd564d122 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> @@ -207,6 +207,7 @@ void a5xx_preempt_hw_init(struct msm_gpu *gpu)
>                 a5xx_gpu->preempt[i]->wptr = 0;
>                 a5xx_gpu->preempt[i]->rptr = 0;
>                 a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;
> +               a5xx_gpu->preempt[i]->rptr_addr = shadowptr(a5xx_gpu, gpu->rb[i]);
>         }
>
>         /* Write a 0 to signal that we aren't switching pagetables */
> @@ -257,7 +258,6 @@ static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu,
>         ptr->data = 0;
>         ptr->cntl = MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE;
>
> -       ptr->rptr_addr = shadowptr(a5xx_gpu, ring);
>         ptr->counter = counters_iova;
>
>         return 0;
> --
> 2.30.2
>