xf86-video-intel: Branch 'xf86-video-intel-2.6-branch' - 2 commits - src/i830_display.c

[Zhenyu Wang]

 src/i830_display.c |   37 +++++++++++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

New commits:
commit 3743747dbcf538ddd6db882bde7243656d0c5596
Author: Ma Ling <ling.ma at intel.com>
Date:   Wed Jan 14 14:46:52 2009 +0800

    Disable VGA plane reliably
    
    This fixes #17235, VGA random hang on recent G45/43 board.
    From spec, SR01 bit 5 should be set before VGA plane disable through
    control register, otherwise we might get random crash and lockups.
    (cherry picked from commit db9f5915ce812144ffd9d2aa42e8ba856129c35e)

diff --git a/src/i830_display.c b/src/i830_display.c
index 82a068c..e1ba661 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -779,6 +779,37 @@ static void i830_modeset_ctl(xf86CrtcPtr crtc, int dpms_state)
 }
 #endif /* DRM_IOCTL_MODESET_CTL && (XF86DRI || DRI2) */
 
+static void
+i830_disable_vga_plane (xf86CrtcPtr crtc)
+{
+    ScrnInfoPtr pScrn = crtc->scrn;
+    I830Ptr pI830 = I830PTR(pScrn);
+    uint32_t vgacntrl = INREG(VGACNTRL);
+    uint8_t sr01;
+
+    if (vgacntrl & VGA_DISP_DISABLE)
+	return;
+
+    /*
+       Set bit 5 of SR01;
+       Wait 30us;
+       */
+    OUTREG8(SRX, 1);
+    sr01 = INREG8(SRX + 1);
+    OUTREG8(SRX + 1, sr01 | (1 << 5));
+    usleep(30);
+
+    vgacntrl |= VGA_DISP_DISABLE;
+
+    /* disable center mode */
+    if (IS_I9XX(pI830))
+	vgacntrl &= ~(3 << 24);
+
+    OUTREG(VGACNTRL, vgacntrl);
+    i830WaitForVblank(pScrn);
+
+}
+
 /**
  * Sets the power management mode of the pipe and plane.
  *
@@ -903,8 +934,7 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
 	}
 
 	/* Disable the VGA plane that we never use. */
-	OUTREG(VGACNTRL, VGA_DISP_DISABLE);
-	i830WaitForVblank(pScrn);
+	i830_disable_vga_plane (crtc);
 
 	break;
     }
commit d994978488648a68ade0d518e5dd40d100e953ed
Author: Keith Packard <keithp at keithp.com>
Date:   Tue Jan 13 20:01:49 2009 -0800

    Assign rotation memory dri_bo to rotation pixmap.
    
    As the rotation memory and rotation pixmap are allocated separately (to make
    rotation at startup work), the allocate dri_bo needs to be set in the pixmap
    for acceleration to work. This restores the performance in rotated modes.
    
    Signed-off-by: Keith Packard <keithp at keithp.com>
    (cherry picked from commit a4b023c17b9c3bd65fb9466ddb8a953f60244402)

diff --git a/src/i830_display.c b/src/i830_display.c
index 7a9999a..82a068c 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1594,6 +1594,7 @@ static PixmapPtr
 i830_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height)
 {
     ScrnInfoPtr pScrn = crtc->scrn;
+    I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
     I830Ptr pI830 = I830PTR(pScrn);
     unsigned long rotate_pitch;
     PixmapPtr rotate_pixmap;
@@ -1614,6 +1615,8 @@ i830_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height)
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		   "Couldn't allocate shadow pixmap for rotated CRTC\n");
     }
+    if (intel_crtc->rotate_mem && intel_crtc->rotate_mem->bo)
+	i830_set_pixmap_bo(rotate_pixmap, intel_crtc->rotate_mem->bo);
     return rotate_pixmap;
 }