[ANNOUNCE] xf86-video-intel 2.21.14

Chris Wilson chris at chris-wilson.co.uk
Sun Aug 4 02:34:52 PDT 2013

Release 2.21.14 (2013-08-04)
A few updates for the top-end Haswell systems (notably GT3 and GT3e
systems), in particular, setting the appropriate thread counts for the
larger GPU and handling a few scaling issues with the emedded DRAM. More
important than the performance tuning though is a fix for a critical
issue encountered by a few people on gen4/gen5 systems.

 * Initial performance tuning for HSW:GT3e

 * Fix a crash with Planetary Annihilation

 * Disable triple buffering for compositors

 * Reserve space in the exec buffer array for deferred VBOs.

Complete list of changes since 2.21.13

Chris Wilson (43):
      intel: Source our PCI IDs table from the copy in the kernel
      intel: Cross-check an unnamed chipset against the list of known PCI-IDs
      intel: Remove the SDV from the list of identified chipsets
      intel: Set the correct marketing names for Ironlake, Sandybridge and Ivybridge
      intel: Replace the codename in the user facing string for unknown Haswell parts
      intel: Only print the unique chipset names
      uxa: Clear up the common intel directory
      uxa: Colocate architecture source files with backend implementation sources
      intel: Move some backend specific macros out of the common header
      intel: Remove some unused macros
      intel: Always define the PCI-IDs
      intel: Remove the unused bridge PCI-IDs
      sna/gen7: Set appropriate thread counts for Valleyview^Baytrail
      sna/gen7: Rename Valleyview to Baytrail
      sna/gen7: Use ivb/byt/hsw shorthand for generation checking
      sna/gen7: Prefer GPU spans for Baytrail as well
      configure: Print a summary of compilation options
      sna: Allow PutImage to utilise userptr for busy targets
      intel: Remove the unused SDV PCI IDs
      uxa: Add the missing include to silence the compiler warning
      sna: Fix limit on stipples to only use immediate operands for <= 32 dwords
      sna: Restore driver info upon FreeScreen
      uxa: Fix incorrect include path
      sna: Composite region is already in dst drawable space
      sna/dri: Prevent stale DRI buffers from a NULL dereference
      sna: Cleanup along all error paths in sna_pre_init()
      intel: Suppress some extremely noisy warnings
      sna: Suppress a few harmless warnings
      sna/dri: Tidy up applying damage to the Pixmap when copying regions
      Suppress a bunch of compiler warnings for using constant strings
      Suppress misleading warnings for -Wmaybe-uninitialized
      sna/gen4: Hide an unused function
      sna/gen7: Set appropriate constants for Haswell GT3
      sna: Allow CPU access to scanouts if WT cached
      sna: Fix interaction between WT mapping of scanouts and allocating from stolen
      sna: Relax readback constraint for CPU mappings of scanouts
      sna/glyphs: Allow glyphs-to-dst to discard CA masks for a8 glyphs
      sna: Don't force inline string-ops for the general memcpy_blt routine
      sna: Add a few more details to the log for mode switching
      sna/dri: Disable TripleBuffering by default for compositors
      sna: Reserve relocation entries for the deferred VBO
      sna: Mark the entire userptr proxy chain as flush/non-reusable
      2.21.14 release

Damien Lespiau (1):
      uxa/display: Keep the EDID blob around for the lifetime of an output

Egbert Eich (1):
      Add support for the dell backlight interface

git tag: 2.21.14

MD5:  cec86adb1746aaa349280af546b335af  xf86-video-intel-2.21.14.tar.bz2
SHA1: 238bd3cbf6e8f471280a163fc47efa8cc5501da4  xf86-video-intel-2.21.14.tar.bz2
SHA256: cc74d482dfd1f6b87773233a6d5c36118039b42fe7f8d99ee28bda7b78aa3b49  xf86-video-intel-2.21.14.tar.bz2

MD5:  284baa4f151c2383d5096dcdabc55b54  xf86-video-intel-2.21.14.tar.gz
SHA1: a2cd1313916aa7d40851174799311ca3b86e51ff  xf86-video-intel-2.21.14.tar.gz
SHA256: 502170600e8a18ebb97fadf88958e057d1a22f62185ee7f2b21774d5dd5da726  xf86-video-intel-2.21.14.tar.gz

Chris Wilson, Intel Open Source Technology Centre
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